1. Technical Field
The present disclosure relates to a display technology. More particularly, the present disclosure relates to a liquid crystal display (LCD) panel and a display driving method.
2. Description of Related Art
The liquid crystal display (LCD) monitors are the most common digital display device now. Reference is made to FIG. 1, which is a schematic diagram illustrating a traditional LCD panel 100. As shown in FIG. 1, each pixel unit 120 of the traditional LCD panel 100 includes a driving switch 122, a storage CST and a pixel capacitor CLC.
In traditional driving manner, all pixel capacitors CLC are usually coupled to the same common electrode COM, and the common electrode COM provides a fixed direct-current (DC) voltage, and it is known as the DC common voltage driving. In order to achieve the pixel polarity inversion driving (dot inversion, row inversion driving, column inversion or frame inversion, etc) in the case that the common voltage is a DC constant (such as fixed at 0 Volts), the data voltage VDATA provided by the data lines D has to been changed significantly between the positive and negative voltage levels (such as +5 volts to −5 volts), such that the power-consumption is heavy and the slew rate of data charging is slow (i.e., a longer charging time).
Therefore, some other driving manners in prior art are proposed. For example, the row inversion driving method provides the common voltage with alternating polarities (e.g., switched between +5 Volts and 0 Volts) to the common electrode COM, such that the data voltage VDATA on the data line D has to been varied between 0 Volts and +5 Volts only, so as to reduce the charging time. Reference is made to FIG. 2, which is a schematic diagram illustrating a LCD panel 102 with row-inversion driving in prior art. As shown in FIG. 2, the voltage of the common electrode COM is switched between the positive-polarity common voltage VcomH and the negative-polarity common voltage VcomL by switching the conductive states of the first switch T1 and the second switch T2 in each row of pixel units.
The storage capacitors of pixel units on each row are respectively coupled to the common electrode lines COM1, COM2 and COM3. The storage capacitors of the pixel units 120 on the first row of the LCD panel 102 are coupled to the common electrode line COM1. The level of the common electrode line COM1 is decided by the conductive states of the first switch T1 and the second switch T2. The gate electrodes of the first switch T1 and the second switch T2 are controlled by adjacent scan lines G1 and G2.